Field of the Invention
The present invention relates to a stacked semiconductor device in which a first semiconductor package and a second semiconductor package are stacked, a printed circuit board including the stacked semiconductor device, and a method for manufacturing the stacked semiconductor device.
Description of the Related Art
As an electronic device such as a portable information device, a digital still camera, or a digital video camera has been miniaturized and made highly functional, and a semiconductor device has been required to be densified and miniaturized. To respond to these requests, a stacked semiconductor device has been developed.
The stacked semiconductor device includes a multi-chip package (MCP) type stacked semiconductor device in which a plurality of semiconductor elements is stacked. However, a performance test is difficult to perform for a single semiconductor element. Thus, it cannot be found out whether the plurality of semiconductor elements operates until the MCP type stacked semiconductor device is completed. Therefore, the final yield of the MCP type stacked semiconductor device significantly decreases because it is the product of the respective efficiency percentages of the semiconductor elements. The larger the number of semiconductor elements to be stacked is, the more the yield decreases.
On the other hand, the semiconductor elements are easily subjected to a performance test if respectively contained in divided semiconductor packages. To manufacture the stacked semiconductor device with a high yield, therefore, the semiconductor packages, which have already been subjected to the performance test and have been guaranteed to be nondefective, are desirably stacked.
A Package in Package (PiP) type stacked semiconductor device has been developed (Japanese Patent No. 4800625). When a stacked semiconductor device of this type is manufactured, a plurality of first semiconductor packages is supplied to manufacturing processes in a sheet form of a semifinished product in which wiring substrates in the first semiconductor packages are connected to one another. Second semiconductor packages in a divided form are respectively stacked on the first semiconductor packages in the sheet form. Then, a conductor pad on the wiring substrate in the first semiconductor package and a conductor pad on the wiring substrate in the second semiconductor package are connected to each other through a metal wiring. Then, the second semiconductor package and the metal wiring, together with a semiconductor element in the first semiconductor package, are encapsulated with a resin. Then, after a connecting terminal composed of a solder is formed on the connecting conductor pad on the wiring substrate in the first semiconductor package, the wiring substrate in the first semiconductor package and an encapsulating resin are cut and divided into stacked semiconductor devices.
The PiP type stacked semiconductor device discussed in Japanese Patent No. 4800625 can use divided semiconductor packages that have already been tested as the second semiconductor packages. Therefore, the stacked semiconductor device can be manufactured with a higher yield than the MCP type stacked semiconductor device.
The plurality of first semiconductor packages is supplied to the manufacturing processes in the sheet form of the semifinished product in which the wiring substrates in the first semiconductor packages are connected to one another to collectively and efficiently manufacture a plurality of stacked semiconductor devices in a wire bonding process, a resin encapsulating process, and a connecting terminal forming process.
However, the first semiconductor packages in the sheet form are in a semifinished product state where the wiring substrates are connected to one another, unlike the divided semiconductor packages. Thus, the first semiconductor packages cannot be handled while having been subjected to a performance test and having been guaranteed to be nondefective, unlike the divided semiconductor packages.
In a method for manufacturing the PiP type stacked semiconductor device, to also use the divided semiconductor packages that have already been tested and have been guaranteed to be nondefective as the first semiconductor packages, a plate material in a sheet form in which a plurality of plate members are connected to one another may be used. If divided second semiconductor packages and the divided first semiconductor packages are respectively fixedly bonded to respective upper surfaces and lower surfaces of the plate members, the plurality of divided semiconductor packages can be supplied as one sheet form to the manufacturing processes through the plate material in the sheet form.
If the plurality of divided semiconductor packages is thus supplied as one sheet form to the manufacturing processes using the plate material in the sheet form, the plurality of stacked semiconductor devices can be collectively and efficiently manufactured, similarly to the conventional PiP type stacked semiconductor device. If the plurality of divided semiconductor packages is manufactured as one sheet form, the PiP type stacked semiconductor device can be manufactured with a higher yield and with productivity remaining high using the divided semiconductor packages, which have been guaranteed to be nondefective, as all the semiconductor packages to be used.
However, the wiring substrate in the semiconductor package is composed of a glass epoxy resin (13 to 40 [ppm]) or a copper foil used for wiring (15 to 20 [ppm]) having a higher linear expansion coefficient than that of the semiconductor element in the semiconductor package. Loading of the semiconductor element is followed by heating at a temperature of approximately 150 [° C.]. Thus, each of the divided semiconductor packages has a shape in which edges (particularly, corners) of the wiring substrate are warped toward the opposite side to a loading surface (one surface) of the semiconductor element at an ordinary temperature due to a difference between the linear expansion coefficients of the wiring substrate and the semiconductor element.
When the plurality of first semiconductor packages is fixedly bonded to the plate material in the sheet form, therefore, each of the first semiconductor packages is loaded while being inclined due to a warped shape of the first semiconductor package and the accuracy of a device on which the first semiconductor package is to be loaded. Thus, loading positions in a height direction of the plurality of first semiconductor packages vary. Further, the loading position in the height direction of each of the first semiconductor packages themselves varies due to a variation in thickness (±50 [μm]) of the first semiconductor package and the accuracy of the device on which the semiconductor package is to be loaded.
Further, if resin encapsulation is performed while the loading positions in the height direction of the plurality of first semiconductor packages loaded on the plate material in the sheet form varies, a gap occurs between a metal mold for resin encapsulation and a rear surface, on the opposite side to the loading surface of the semiconductor element, of the wiring substrate in each of the first semiconductor packages. When there is a gap between the metal mold for resin encapsulation and the rear surface of the wiring substrate in the first semiconductor package, an encapsulating resin enters the gap during the resin encapsulation.
When each of the semiconductor packages is heated, thermal deformation occurs due to the difference between the linear expansion coefficients of the wiring substrate and the semiconductor element. When the semiconductor package is resin-encapsulated, the semiconductor package is heated at a temperature of approximately 170 [° C.], which is higher than a heating temperature of 150 [° C.] when the semiconductor element is loaded on the wiring substrate. Therefore, edges of the wiring substrate in the first semiconductor package, which has been loaded on the plate material in the sheet form, are warped toward the loading surface of the semiconductor element due to the thermal deformation.
When the edges of the wiring substrate in each of the plurality of first semiconductor packages loaded on the plate material in the sheet form are thus warped toward the loading surface, a gap occurs between the metal mold for resin encapsulation and the rear surface of the wiring substrate in the first semiconductor package. If there is a gap between the metal mold for resin encapsulation and the rear surfaces of the wiring substrate in the first semiconductor package, the encapsulating resin enters the gap during the resin encapsulation.
When the encapsulating resin wraps around the rear surface of the first semiconductor package, a resin burr is generated on the rear surface of the wiring substrate in the first semiconductor package. When the resin burr is generated on the rear surface of the wiring substrate in the first semiconductor package, a connecting conductor pad disposed on the rear surface of the wiring substrate in the first semiconductor package is covered with the resin burr. Thus, a connecting terminal such as a solder ball cannot be formed, resulting in defective connection. If the divided first semiconductor packages and the divided second semiconductor packages are thus fixedly bonded to the plate members to manufacture the PiP type stacked semiconductor device, the yield of the PiP type stacked semiconductor device decreases due to the resin burr.
The present invention is directed to providing a stacked semiconductor device having a high yield, a printed circuit board, and a method for manufacturing the stacked semiconductor device.